While the later one is as expected, can anyone please explain the
Big-Endian counterpart? Considering the showBits() method to be
correct, how can PSR=0x3F00003D give rise to IMPL=15, VER=3, CWP=7
values? How is the bit-field is being arranged and interpreted in
memory on a Big-Endian system?
As far as I recall the bit fields in a structure are described in right to left order on x86. I cannot recall if this is true for Sparc also; it's been a while. However, the best way to check is to look at the compiler documentation: this is Microsoft's take on the issue[^].
One of these days I'm going to think of a really clever signature.
The short answer is that bit-field allocation/alignment is pretty much totally at the mercy of the implementation, according to the standards.
In other words, the compiler writer can do almost anything she wants, as long as it's internally consistent.
Software rusts. Simon Stephenson, ca 1994. So does this signature. me, 2012