The translation logic of the address to physical address

Please see my comment to the question. This addressing model is only for real mode of x86, and is extremely simple: http://en.wikipedia.org/wiki/X86_memory_segmentation[^].

In both 80286 and especially in 80386, there is a lot more.

[EDIT #1]

Let's see. Imagine you about to design addressing for a CPU, but some main decisions are already made, and it is decided that all registers will be 8 or 16 bits, and the system address bus is only 20 bits (to address no more than 1M of memory). Those are most basic hardware limitations, they are given; and let's say you need to define further detail, the instruction set.

How would you address the memory? One 16-bit register is not enough, two registers would make 32-bits, way too many. It already tells us that segment:offset address would have to make bigger address space then physically available. It means one of the two options: either some of the values in segment:offset space should be considered invalid, or a single physical address could be represented with different segment:offset pairs. It's pretty obvious that the second solution is somewhat better. Most memory objects could be limited by 64K (one 16-bit register can address 64K), so we can pass the address of object in the form of address:offset just once, and internally operate only with offsets.

Let's start with segment. As it is explained in the article, " the 16-bit segment selector is interpreted as the most significant 16 bits of a linear 20-bit address".

Let's see how it looks in hexadecimal form, which is the easiest. One hexadecimal digits represent 4 bits. If you have the address 1234:0000, it is translated to the physical address of 12340 (5 digits of 4 bit make 20 bits). And the offset part simply add and offset to the physical address. Let's say, some address is loaded in DS:DX registers. The physical address is calculated as (DS << 4) + DX. For the ABCD:0000 example, it would be

DS: ABCD
(DS << 4):  12340
physical address: 12340 + 0.

Put different values in DX, and you will get the address range between 12340 to 12340 + FFFF.

Now you can see overlapping. Let's consider the range of physical addresses for closest segments, segments are shifted by 16 (4 bit shift), but the size of segments is 64K:

1234:0000 .. 1234:FFFF means 12340 .. 2233F
1235:0000 .. 1235:FFFF means 12350 .. 2234F
1236:0000 .. 1236:FFFF means 12350 .. 2235F
...and so on, with the increment of 16

[EDIT #2]

Same thing, even simpler: imagine that your 20-bit address space is subdivided by "marks", positioned from zero, with 16-byte distance between them. They can be enumerated from 0 to FFFF. Now, in the CPU address segment:offset, the segment means the number of such mark, and offset means the offset in bytes from this mark.

Note that in PC board architectures based on 8086/8088 ("PC XT"), only 640K of memory was physically installable and accessible. Later, when 80286 CPUs arrived, newer architecture "PC AT" introduced somewhat lame version of protected mode which almost never was practically used. Even though such PCs allowed some Megs of memory, real mode did not allow addressing even the first 1M, it remained 640K (with the full megabyte accessible with some dirty tricks). I met a number of morons very proud of megabytes they purchased who never understood that their systems did not use them. There was no a widespread good system working in protection mode (I don't count so called "DOS extenders" which also were not common). Only i386 finally broke the ice.

—SA