Xilinx FPGA with AVRILOS

grilialex

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9 Nov 2011CDDL21 min read

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How-To Embed Xilinx FPGA Configuration Data to AVRILOS

avr16_V120.zip
- avr16
  - build.dep
    - adc.P
    - applic.P
    - dbgext.P
    - debugger.P
    - delay.P
    - eeprom.P
    - fpga_cfg.P
    - fpgassi.P
    - kernel.P
    - Motor.P
    - robolayer.P
    - serapp.P
    - Timer0.P
    - typeconv.P
    - Uart.P
    - xcs_cfg.P
  - build.err
  - build.lst
    - adc.lst
    - applic.lst
    - dbgext.lst
    - debugger.lst
    - delay.lst
    - eeprom.lst
    - fpga_cfg.lst
    - fpgassi.lst
    - kernel.lst
    - kernel.map
    - Motor.lst
    - robolayer.lst
    - serapp.lst
    - Timer0.lst
    - typeconv.lst
    - Uart.lst
    - xcs_cfg.lst
  - build.obj
    - adc.o
    - applic.o
    - dbgext.o
    - debugger.o
    - delay.o
    - eeprom.o
    - fpga_cfg.o
    - fpgassi.o
    - kernel.elf
    - kernel.o
    - kernel.obj
    - Motor.o
    - robolayer.o
    - serapp.o
    - Timer0.o
    - typeconv.o
    - Uart.o
    - xcs_cfg.o
  - build.rom
    - kernel.eep
    - kernel.rom
  - cfg
    - compile.in
    - compileflags.in
    - env.in
    - hw.in
    - srcobj.in
    - swdef.in
  - kernel_elf.aps
  - kernel_elf.aws
  - license.txt
  - makefile
  - src
    - applic
      - applic.c
      - applic.h
      - cfg
        
        fpga_cfg.c
        
        fpga_cfg.h
      - fpgassi.c
      - fpgassi.h
      - Kernel.c
      - robolayer.c
      - robolayer.h
      - serapp.c
      - serapp.h
    - debug
    - includes
    - periphext
      - asciitab.h
      - keymat44.c
      - keymat44.h
      - lcm_char.c
      - lcm_char.h
      - lpc.c
      - lpc.h
      - scard.c
      - scard.h
      - sst.c
      - sst.h
      - xcs_cfg.c
      - xcs_cfg.h
    - periphint
      - adc.c
      - adc.h
      - eeprom.c
      - eeprom.h
      - Motor.c
      - Motor.h
      - spi.c
      - spi.h
      - Timer0.c
      - Timer0.h
      - Timer1.c
      - Timer1.h
      - Uart.c
      - Uart.h
    - Utils
      - delay.c
      - delay.h
      - typeconv.c
      - typeconv.h

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License

This article, along with any associated source code and files, is licensed under The Common Development and Distribution License (CDDL)

Written By

grilialex

Systems Engineer AI ZeroCaliber Ltd

Cyprus

More than 15 year of Embedded Systems development designing both hardware & software.
Experience with Product Development,lab prototypes and Automated Testers, Sensors, motors and System Engineering. Have used numerous micro-controllers/processors, DSP & FPGAs.

Please check AI ZeroCaliber if you need any help.
You may find also my personal site: Ilialex and my blog site: Ilialex Blog

Xilinx FPGA with AVRILOS

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