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I compiled the benchmark_src code using vs2005 and when i run it i get an unhandled exception when the program reaches the cli asm instruction in CanManipulateIP(). The exception is 0xC0000096: Privileged instruction. Did some search using google but no luck
Also i assume by looking at the code that this call is in a try block followed by a catch(...), which should have caught all exceptions!!
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diduke wrote: The exception is 0xC0000096: Privileged instruction.
this exception is thrown on OS-es that don`t allow IP flag manipulation. i`ve tested the code on win98SE, which is able to clear and set the interrupt flag and winXPPro which isn`t (on XP the exception was catched).
could you please post more details (OS you use, how did you implement the test, how did you run the benchmark when exception occured...) ?
if (xx + xy) % 2 return xx else return xy
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Well, i'm using winxp and vs2005 and when i commented the code with the inlined cli, sti instructions all went well. I left just "return false" in function CanManipulateIP() and all is fine now. I tried several test with very simple functions including your sample and none of them was working. The weird thing though is why try {} catch(...) didn't work. I usually don't use exceptions, do i need to enable them somehow (i think it SHOULD have worked).
I suggest you test against windows version with #ifdef, so you can hide these instructions in winxp. After some reading on msdn, i found that only drivers can have access to these instructions (mayabe i'm wrong about the last bit).
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could you run the test.exe (included in the download) without getting the error? could you please reveal the kind of your cpu?
if (xx + xy) % 2 return xx else return xy
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i run the test (that came with the download) without having any problem, but it crashed (priviliged instruction) when i compiled the included source code.
the cpu is an AMD AthlonXP 2600+
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diduke wrote: i run the test (that came with the download) without having any problem, but it crashed (priviliged instruction) when i compiled the included source code.
i`m not sure but it seems to me like something in your vc++ settings (but once again - it`s just a guess.) are you able to compile and run something like this ?:
int main(int argc, char* argv[])
{
int* c = 0;
try
{
c[0] = 5;
}
catch(...)
{
printf("Exception catched.");
}
return 0;
}
if (xx + xy) % 2 return xx else return xy
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i compiled the snippet you posted, and it didn't work with vs2005 default project settings. in order to work you need to go to "project settings --> C/C++ --> Enable C++ Exceptions --> Yes With SEH Expections (/EHa)", otherwise it only catches C++ exceptions (according to documentation)!!. Don't know if it is the same for other versions of visual studio. (i have never tried to use exceptions like that). Also your code now compiles and runs nice
thanks for helping!
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i`m glad you`ve solved the problem.
if (xx + xy) % 2 return xx else return xy
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RDTSC has a number of limitations that have to be born in mind:
1) Its timing information is locked to the cycle counter of the processor.
2) Dual core CPUs do not guarantee synchonisation between cycle counters (this is already an issue with certain games).
3) CPU frequency is not fixed! (P4M for example but this is also being used more on desktop systems).
On the whole I would recommend QueryPerformanceCounter as a first stab which will use dedicated mobo timing devices when available and will fall back to RDTSC when not. QPC is supposed to be multi-core aware and driver bugs aside should code with 2 nicely.
Also resample to ensure frequency hasn't changed much between runs.
As written these issues will probably not affect the demo code much (dual core synch problems may still be evident) but the casual reader may be bitten.
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Hal Angseesing wrote: 2) Dual core CPUs do not guarantee synchonisation between cycle counters (this is already an issue with certain games).
since i don`t work on dual core cpu, i had no possibility to test it (that`s why it is missing) but i think that something like SetProcessAffinityMask(current_process, 1) should satisfy such a system.
Hal Angseesing wrote: On the whole I would recommend QueryPerformanceCounter as a first stab which will use dedicated mobo timing devices when available and will fall back to RDTSC when not. QPC is supposed to be multi-core aware and driver bugs aside should code with 2 nicely.
my intent was to measure the processor clock cycles.
Hal Angseesing wrote: 3) CPU frequency is not fixed! (P4M for example but this is also being used more on desktop systems).
IA-32 Intel(R) Architecture Software Developer’s Manual, Volume 3: System Programming Guide:
"...Members of the processor families increment the time-stamp counter differently:
- For Pentium M processors (family [06H], models [09H, 0DH]); for Pentium 4 processors, Intel Xeon processors (family [0FH], models [00H, 01H, or 02H]); and for P6 family processors: the time-stamp counter increments with every internal processor clock cycle. The internal processor clock cycle is determined by the current core-clock to bus-clock ratio. Intel(R)SpeedStep(R) technology transitions may also impact the processor clock.
- For Pentium 4 processors, Intel Xeon processors (family [0FH], models [03H and higher]): the time-stamp counter increments at a constant rate. That rate may be set by the maximum core-clock to bus-clock ratio of the processor or may be set by the frequency at which the processor is booted. The specific processor configuration determines the behavior. Constant TSC behavior ensures that the duration of each clock tick is uniform and supports the use of the TSC as a wall clock timer even if the processor core changes frequency. This is the architectural behavior moving forward..."
if (xx + xy) % 2 return xx else return xy
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It seems like a good article, but a few example in the article would help better. For instance, for each step you could show a sample code with the changes...
I hope you revise and add more to the article
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i`ve already submitted the update so please check again in a few days...i hope.
if (xx + xy) % 2 return xx else return xy
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