Based on sorting out other busses e.g. I2C, CAN I'd recommend:
Build in, or use, some logging facility to record what's happening on each chip, even if its only a count or letter stored to show where you're code is going.
Use a USB to SPI converter or something you know works to prove each work individually - it's much easier when one end is a 'known' rather than with and 'unknown' at each end of the wire.
Read the manuals on the chips and on the SPI bus - I know it's obvious, but chip manuals tend to focus on how the chip works - not on the bus. Get the manual on the bus protocol.
Have someone else look at it and show them, OK perhaps you wouldn't be posting here if you could do that but it really helps. I saw someone debug for days without turning power on to a stepper motor he was trying to step.
Try and scope the interaction signals, and work through them, after all there should show exactly what's happening: which chip is not responding or signalling as expected.
Don't handle just the happy path, handle the error cases as well - e.g. set timeouts and set sone code to log if the time out occurs even if its just to log what the error was.
I took out my 5 years old laptop to re-install and give it to my daughter.
As she's working with Windows in the school I intend to install Windows 7 (Professional).
As the laptop has 4 GB memory I'm not sure what would be better, install 32 bit and loose some memory range or install 64 bit and loose - maybe - some performance?
I'm not questioning your powers of observation; I'm merely remarking upon the paradox of asking a masked man who he is (V).
You didn't said about the processor. still based on your question,
Win 7 (Any version except Basic) x32 bit can not use more then 3.25 GB of RAM (even if you have 16 GB RAM)
while Win7 x64 bit can use any amount of RAM, So as you have 4GB and if you want to use full of it you have to load Windows 7 x64bit - or any O/S x64bit it may Vista/Win8 Anything.
Performance : x64bit will support almost every application that developed for a x32bit machine. And there will be no performance issue. I m using x64bit in my Home PC (that have 8GB) and in my Laptop (4GB)
Only drivers will not support x64bit if they made for x32bit.
Here is a link where you can get all Laptop and other components drivers in one page.
Hi, I'm trying to interface a gap sensor with pic micro-controller but I'm not winning. I wanna design a barcode reader. Can anyone help me with the circuit that I can use to interface the gap sensor with a PIC16F series please.
I've always wondered if it was possible to take an old 6502 or 65816 microprocessor, which run in the 1-3 MHz range, and get it to run in the GHz range. I know I can run an emulator of an Apple II machine at high speed, but has anyone ever done it with the real hardware?
Something about a blazing fast computer with a simplified instruction set (only 256 opcodes!) that really appeals to me!
Simplistically speaking, so long as you can get rid of the heat you're going to generate by running at higher clock speeds, yes, it's possible, but only to a certain limit. Internal timing structures will eventually prohibit you from going faster.
But, you have a bigger problem. The supporting chipset for the CPU will not be able to keep up with your higher clock speeds and you'll run into all kinds of timing problems there too, probably much sooner than you run into problems with the CPU alone. The stuff simply wasn't designed to go that fast.
Oh, I wouldn't be surprised if you needed a liquid nitrogen cooler to get rid of the heat you'll generate by clocking a 6502 into the GHz range.
Running an emulator is VASTLY different from running actual hardware.
These CPUs are heavily CISC in nature, and originally had been implemented (supposedly) as multi-cycle FSMs. In order to get the modern high clock rates and high IPCs, such CPUs have to be reimplemented as RISC, superscalar pipelines, adding a complex instruction decoder (as in x86) to get away from CISC restrictions. It does not make much sense to do so - much easier to synthesise a simple MIPS core of a comparable complexity.