Frequency Divider with VHDL

Carlos A. Ramos

Rate me:

3.83/5 (5 votes)

21 Aug 2012CPOL1 min read

194.3K

490

This brief article describes a frequency divider with VHDL along with the process to calculate the scaling factor.

Views

Daily Counts

Downloads

Weekly Counts

License

This article, along with any associated source code and files, is licensed under The Code Project Open License (CPOL)

Written By

Carlos A. Ramos

Engineer Estado Finito

Mexico

Mechatronics Engineer, with a biased interest in digital systems design and development. Currently studying Master's degree in Electrical Engineering and running a blog about digital design at Estado Finito.

Frequency Divider with VHDL

Views

Downloads

License

Comments and Discussions